1. Field of the Invention
The present invention relates to a D/A conversion (Digital/Analog conversion) circuit (DAC). Particularly, the invention relates to a DAC used for a driving circuit of a semiconductor device. Besides, the invention relates to a semiconductor device using this DAC.
2. Description of the Related Art
Recently, a technique of fabricating a semiconductor device in which a semiconductor thin film is formed on an inexpensive glass substrate, such as a thin film transistor (TFT), has been rapidly developed. This is because the demand for an active matrix type liquid crystal display device has been increased.
In the active matrix type liquid crystal display device, a pixel TFT is disposed for each of several tens to several million pixel regions arranged in matrix form, and an electric charge going in and out of a pixel electrode connected to each pixel TFT is controlled by the switching function of the pixel TFT.
Especially, with the improvement in fineness and picture quality of a display device, attention has been paid on a digital driving system active matrix type liquid crystal display device which can be driven at high speed.
The digital driving system active matrix type liquid crystal display device requires a D/A conversion circuit (DAC) for converting a digital signal inputted from the outside into an analog signal (gray scale voltage). Although there are various kinds of D/A conversion circuits, an example of a DAC used for the active matrix type liquid crystal display device will be described here.
Reference will be made to FIG. 15. FIG. 15 shows an example of a conventional DAC. The conventional DAC shown in FIG. 15 includes n switches (SW0 to SWnxe2x88x922) controlled by respective bits of an n-bit digital signal (D0 to Dnxe2x88x921), capacitors (C, 2C, . . . , 2nxe2x88x921C) connected to the respective switches (SW0 to SWnxe2x88x921), and a reset switch SWR. Besides, a power source H and a power source L are connected to this conventional DAC. A potential Vout, of an analog signal outputted from the DAC is given to a source signal line (output line).
When the applied digital signal (D0 to Dnxe2x88x921) is 0 (Lo), the switches (SW0 to SWnxe2x88x921) are respectively connected to the power source L, and when the applied digital signal (D0 to Dnxe2x88x921) is 1 (Hi), they are respectively connected to the power source H.
The operation of this conventional DAC will be described in sequence. The operation of this conventional DAC is divided into a reset period TR and a writing period TE, and the description will be made on the respective periods.
First, in the reset period TR, the reset switch SWR is closed, and all the bits (D0 to Dnxe2x88x921) of the digital signal become 0 (Lo), so that all the switches (SW0 to SWnxe2x88x921) are connected to the power source L. An equivalent circuit diagram of this conventional DAC in this state is shown in FIG. 16A.
Immediately after the completion of the reset period TR, all the bits (D0 to Dnxe2x88x921) of the digital signal is 0 (Lo). After the completion of the reset period TR, the writing period TE starts, and the digital signal (D0 to Dnxe2x88x921) having arbitrary bit information of 0 (Lo) or 1 (Hi) controls the switches (SW0 to SWnxe2x88x921) Then, an electric charge corresponding to each bit information is charged/discharged, and thereafter, a steady state is attained. An equivalent circuit diagram at this time is shown in FIG. 16B.
A digital signal can be converted into an analog signal by repeating the foregoing operation of the reset period TR and the writing period TE.
In recent years, a liquid crystal panel included in an active matrix type liquid crystal display device is demanded to be made thin and lightweight, and at the same time, high precision, high picture quality, and high luminance have been also demanded. Thus, it is desired that the area of a D/A conversion circuit is made small.
However, a driving circuit including the D/A conversion circuit as described above must include the n switches, n capacitors, and one reset switch in order to convert the n-bit digital signal to the analog signal. Thus, it is difficult to prevent its area from increasing, which is one of the causes of the obstruction to the miniaturization of a semiconductor device, particularly, an active matrix type liquid crystal display device.
Besides, for the purpose of attaining high precision of a semiconductor device, it becomes necessary to increase the number of pixels, that is, the number of source signal lines. However, as described above, if the number of source signal lines is increased, the number of D/A conversion circuits is also increased, and the area of the driving circuit is increased, which prevents the improvement in high precision.
From the reasons described above, a D/A conversion circuit having a small area has been required.
The present invention has been made in view of the above problems, and has an object to provide a D/A conversion circuit which can make its area small. The DAC of the invention will be described below.
The present invention relates to a DAC for converting a 2n-bit digital signal into an analog signal, and is characterized in that the 2n-bit digital signal is divided into upper n bits and lower n bits, and after the upper n bits are inputted to the DAC, the lower n bits are inputted to the DAC. When the digital signal of the upper n bits is inputted to the DAC, one electrode of each of n capacitors with capacitance value expressed by 2nxe2x88x921 C (C is a constant) is connected to a power source L or a power source H. A potential Vout1 of an analog signal by upper bit information is given from the DAC to a source signal line connected to the other electrode of each of the n capacitors. Subsequently, the digital signal of the lower n bits is inputted to the DAC, so that the one electrode of each of the n capacitors is connected to the power source L or the power source H. A potential Vout2 of an analog signal by the lower bit information from the DAC is given to the source signal line connected to the other electrode of each of the n capacitors through a coupling capacitor Ck having a constant capacitance value.
Like this, after the analog signal by the upper bit information is written to the source signal line, the analog signal by the lower bit information is further written, so that the analog signal by the upper bit information is combined with the analog signal by the lower bit information to form an analog signal and it can be inputted to the source signal line.
The capacitance value of the coupling capacitor Ck can be suitably set by a designer so that the analog signal outputted from the DAC is linearly changed by changing bit information of the digital signal.
Since the present invention has the foregoing structure, it has become possible to convert the 2n-bit digital signal into the analog signal by the DAC using the n capacitors and one coupling capacitor Ck. Thus, the size of the DAC can be made approximately half of the size of a conventional DAC. As a result, the area of a driving circuit can be made small, and it has become possible to make a liquid crystal panel included in an active matrix type liquid crystal display device thin and lightweight. Besides, even if the number of source signal lines is increased and the number of D/A conversion circuits is increased, since the area of the D/A conversion circuit can be made small, the increase of the area of a driving circuit by higher precision can be made small as compared with the case using the conventional DAC.
Incidentally, the DAC of the present invention is not limited to only an active matrix type liquid crystal display device, but can also be used for a display device having, for example, an EL (electroluminescence) element.
The structure of the DAC of the present invention is described below.
According to an aspect of the present invention, a D/A conversion circuit for converting a 2n-bit digital signal (n is a natural number) into an analog signal includes n n switches, n capacitors, and a coupling capacitor, wherein
in an upper bit writing period, upper n bits of the digital signal respectively control the n switches to control charging and discharging of electric charges to the n capacitors, and the n capacitors are connected to an output line, and
in a lower bit writing period, lower n bits of the digital signal respectively control the n switches to control charging and discharging of electric charges to the n capacitors, and the n capacitors are connected to the output line through the coupling capacitor.
According to another aspect of the present invention, a D/A conversion circuit for converting a 2n-bit digital signal (n is a natural number) into an analog signal includes n switches, n capacitors, and a coupling capacitor, wherein
in a first period, one of two electrodes of each of the n capacitors is connected to a first power source, and the other electrode is connected to a third power source;
in a second period, upper n bits of the digital signal respectively control the n switches, the one electrode is connected to the first power source or a second power source, and the other electrode is connected to an output line;
in a third period, the one electrode is connected to the first power source, and the other electrode becomes floating; and
in a fourth period, lower n bits of the digital signal respectively control the n switches, the one electrode is connected to the first power source or the second power source, and the other electrode is connected to the output line.
According to still another aspect of the present invention, a semiconductor device comprising a source signal line driving circuit, a gate signal line driving circuit, and a pixel portion,
wherein the source signal line driving circuit includes a D/A conversion circuit for converting a 2n-bit digital signal (n is a natural number) into an analog signal,
wherein the D/A conversion circuit comprises n switches, n capacitors, and a coupling capacitor, and
wherein in an upper bit writing period, upper n bits of the digital signal respectively control the n switches to control charging and discharging of electric charges to the n capacitors, and the n capacitors are connected to an output line, and
in a lower bit writing period, lower n bits of the digital signal respectively control the n switches to control charging and discharging of electric charges to the n capacitors, and the n capacitors are connected to the output line through the coupling capacitor.
According to still another aspect of the present invention, a semiconductor device which comprises a source signal line driving circuit, a gate signal line driving circuit, and a pixel portion,
wherein the source signal line driving circuit includes a D/A conversion circuit for converting a 2-bit digital signal (n is a natural number) into an analog signal,
wherein the D-A conversion circuit comprises n switches, n capacitors, and a coupling capacitance, and
wherein in a first period, one of two electrodes of each of the n capacitors is connected to a first power source, and the other electrode is connected to a third power source;
in a second period, upper n bits of the digital signal respectively control the n switches, the one electrode is connected to the first power source or a second power source, and the other electrode is connected to an output line;
in a third period, the one electrode is connected to the first power source, and the other electrode becomes floating; and
in a fourth period, lower n bits of the digital signal respectively control the n switches, the one electrode is connected to the first power source or the second power source, and the other electrode is connected to the output line.
Power source potential VL of the first power source may be lower than power source potential VH of the second power source.
The switch may include a thin film transistor.
Besides, there is provided a rear projector, a front projector, a goggle display, a mobile computer, a notebook personal computer, a video camera, a DVD player, or a game machine each including the D/A conversion circuit.